not_IO@lemmy.blahaj.zone to Programmer Humor@programming.devEnglish · 2 days agomegaboollemmy.blahaj.zoneimagemessage-square37fedilinkarrow-up1432arrow-down13file-text
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minus-squareYorick@piefed.sociallinkfedilinkEnglisharrow-up25·1 day agoMay I introduce the VHDL STD library where you can set an output to “don’t care”: Wikipedia IEEE-1164 As an embedded electronics engineer discovering VHDL was a blast and a mindfuck!
minus-squarewhite_nrdy@programming.devlinkfedilinkarrow-up12·1 day agoDon’t worry, VHDL is still a mindfuck sometimes even after being an FPGA engineer for years (mostly only using VHDL). It’s such a cool language, and I am glad you discovered and are enjoying it!
minus-squareblibla@slrpnk.netlinkfedilinkarrow-up1·1 day agoits just what most people what vall illegal state or impossible?
May I introduce the VHDL STD library where you can set an output to “don’t care”:
Wikipedia IEEE-1164
As an embedded electronics engineer discovering VHDL was a blast and a mindfuck!
Don’t worry, VHDL is still a mindfuck sometimes even after being an FPGA engineer for years (mostly only using VHDL). It’s such a cool language, and I am glad you discovered and are enjoying it!
its just what most people what vall illegal state or impossible?